Valerio Di Lecce

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Ing. Valerio Di Lecce, Ph.D. Student

International Doctorate School in Information and Communication Technologies
Course: ICT (Curriculum: Electronics and Telecommmunications)

Department of Information Engineering
University of Modena and Reggio Emilia
Strada Vignolese 905, I–41125 Modena MO, ITALY

Phone: +39 059 2056191
e-mail: valerio.dilecce@unimore.it

Valerio Di Lecce was born in Modena, Italy, in 1982. He received the bachelor and master degree in electronic engineering (both summa cum laude) from the University of Modena and Reggio Emilia, Modena, Italy, in 2005 and 2008, respectively. Since 2009, he has been working toward the Ph.D. degree in electronics and telecommunications engineering with the Department of Information Engineering, within the University of Modena and Reggio Emilia, Modena, Italy, on the topic "Characterization and numerical simulations of GaN HEMTs for microwave and millimeter-wave power applications".

Publications

Journals:

[J3] M. Esposto, V. Di Lecce, M. Bonaiuti, and A. Chini, "The influence of interface states at Schottky junction on the large signal behavior of Copper-gate GaN HEMTs", accepted for publication on IEEE Transaction on Device and Material Reliability

[J2] V. Di Lecce, M. Esposto, M. Bonaiuti, G. Meneghesso, E. Zanoni, F. Fantini, and A. Chini, "Experimental and simulated dc degradation of GaN HEMTs by means of gate-drain and gate-source reverse bias stress", Microelectronics Reliabilty, Vol. 50, Issues 9-11: 21st European Symposium on Reliability of Electron Devices, Failure Physics and Analysis, Sep.-Nov. 2010, pp. 1523–1527

[J1] A. Chini, V. Di Lecce, M. Esposto, G. Meneghesso, and E. Zanoni, "Evaluation and Numerical Simulations of GaN HEMTs Electrical Degradation", IEEE Electron Device Letters, Vol. 30 no. 10, Oct. 2009, pp. 1021–1023

Conferences and Workshops:

[C13] V. Di Lecce, M. Esposto, M. Bonaiuti, G. Meneghesso, E. Zanoni, F. Fantini, and A. Chini, "Study of GaN HEMTs degradation by numerical simulations of scattering parameters", accepted at the 19th European Workshop on Heterostructure Technology—HETECH 2010, Fodele (Crete), Oct. 2010

[C12] M. Esposto, P. S. Park, D. N. Nath, S. Kryshnamoorthy, F. Akyol, V. Di Lecce, A. Chini, and S. Rajan, "Design of GaN HEMTs for Power Switching Operation", accepted for oral presentation at the 19th European Workshop on Heterostructure Technology—HETECH 2010, Fodele (Crete), Oct. 2010

[C11] V. Di Lecce, M. Esposto, M. Bonaiuti, G. Meneghesso, E. Zanoni, F. Fantini, and A. Chini, "Experimental and simulated dc degradation of GaN HEMTs by means of gate-drain and gate-source reverse bias stress", accepted for oral presentation at the 21st European Symposium on Reliability of Electron Devices, Failure Physics and Analysis—ESREF 2010, Gaeta (Italy), Oct. 2010

[C10] V. Di Lecce, M. Esposto, M. Bonaiuti, F. Fantini, and A. Chini, "Study of GaN HEMTs Electrical Degradation by Means of Numerical Simulations", 40th European Solid-State Device Research Conference—ESSDERC 2010, Sevilla (Spain), Sep. 2010

[C9] A. Chini, F. Fantini, V. Di Lecce, M. Esposto, A. Stocco, N. Ronchi, F. Zanon, G. Meneghesso, and E. Zanoni, "Correlation between dc and RF degradation due to deep levels in AlGaN/GaN HEMTs", 2009 International Electron Devices Meeting—IEDM 2009, Baltimore MD (USA), Dec. 2009

[C8] D. Saguatti, V. Di Lecce, M. Esposto, A. Chini, F. Fantini, G. Verzellesi, S. Boulay, A. Bouloukou, B. Boudjelida, and M. Missous, “Design of field-plated InP-based HEMTs”, 18th European Heterostructure Technology Workshop—HeTech 2009, Günzburg/Ulm (Germany), Nov. 2009

[C7] M. Esposto, V. Di Lecce, M. Bonaiuti, F. Fantini, G. Verzellesi, S. De Guido, M. De Vittorio, A. Passaseo, and A. Chini, "Influence of interface states at Schottky junction on the large signal behaviour of Cu-gate standard AlGaN/GaN HEMTs", 18th European Heterostructure Technology Workshop—HETECH 2009, Günzburg/Ulm (Germany), Nov. 2009

[C6] V. Di Lecce, M. Esposto, M. Bonaiuti, F. Fantini, A. Chini, G. Meneghesso, and E. Zanoni, "Influence of RF drive and switching frequency on degradation mechanisms in GaN HEMTs", 18th European Heterostructure Technology Workshop—HETECH 2009, Günzburg/Ulm (Germany), Nov. 2009

[C5] G. Meneghesso, M. Meneghini, A. Tazzoli, N. Ronchi, A. Stocco, E. Zanoni, V. Di Lecce, M. Esposto, and A. Chini, "GaN HEMT Degradation Induced by Reverse Gate Bias Stress", 8th International Conference on Nitride Semiconductors—ICNS-8 2009, Jeju (South Korea), Oct. 2009

[C4] A. Chini, V. Di Lecce, M. Esposto, G. Meneghesso, and E. Zanoni, "RF Degradation of GaN HEMTs and its correlation with DC stress and I-DLTS measurements", European Microwave Week—EuMW 2009, Rome (Italy), Sep. 2009

[C3] M. Esposto, V. Di Lecce, A. Chini, S. De Guido, A. Passaseo, and M. De Vittorio, "Comparison of Cu-gate and Ni/Au-gate GaN HEMTs large signal characteristics", 39th European Solid-State Device Research Conference—ESSDERC 2009, Athens (Greece), Sep. 2009

[C2] E. Zanoni, M. Meneghini, A. Tazzoli, N. Ronchi, A. Stocco, V. Di Lecce, M. Esposto, A. Chini, and G. Meneghesso, "Reverse gate bias stress induced degradation of GaN HEMT", 36th International Symposium on Compound Semiconductors—ISCS 2009, Santa Barbara CA (USA), Sep. 2009

[C1] A. Chini, V. Di Lecce, M. Esposto, G. Verzellesi, S. Lavagna, A. Cetronio, and C. Lanzieri, "Trapping phenomena in field-plated high power GaAs pHEMTs", 17th European Heterostructure Technology Workshop—HeTech 2008, Venice (Italy), Nov. 2008