https://web.ing.unimo.it/wiki/api.php?action=feedcontributions&feedformat=atom&user=Lmorassi 2026-04-08T15:25:15Z User contributions MediaWiki 1.39.7 https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=8104 2011-07-04T08:04:59Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications in journals:<br /> <br /> [J1] A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, &quot;A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, IEEE Electron Device Letters, vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> [J2] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, IEEE Transactions on Electron Devices, vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> [J3] G. Bersuker, D. Veksler, C. D. Young, H. Park, W. Taylor, P. Kirsch, R, Jammy, '''L. Morassi''', A. Padovani, and L. Larcher, “Connecting electrical and structural dielectric characteristics”, International Journal of High Speed Electronics and Systems (IJHSES), vol. 20(1), pp. 65-79, 2011.<br /> <br /> <br /> ----<br /> <br /> List of publications in international conferences:<br /> <br /> [C1] '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> [C2] G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> [C3] G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> [C4] '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> [C5] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> [C6] '''L. Morassi''', G. Verzellesi, P. Pavan, D. Veksler, I. Ok, H. Zhao, J. C. Lee and G. Bersuker, “Experimental/numerical investigation of buried-channel InGaA MOS-HEMTs with Al2O3 gate dielectric”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 103-105.<br /> <br /> [C7] '''L. Morassi''', G. Verzellesi, L. Larcher, I. Ok, H. Zhao and J. C. Lee, “Errors affecting split-CV mobility measurements in InGaAs MOS-HEMTs”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 327-329.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium (IRPS 2010); presentation of the work [C4]. <br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology (HETECH 2010); presentation of the work [C5]. <br /> <br /> Participation at the conference: 23rd International Conference on Indium Phosphide and Related Materials (IPRM 2011): presentation of the works [C6] and [C7].<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=8082 2011-06-01T10:35:43Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications in journals:<br /> <br /> [J1] A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, &quot;A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, IEEE Electron Device Letters, vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> [J2] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, IEEE Transactions on Electron Devices, vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> [J3] G. Bersuker, D. Veksler, C. D. Young, H. Park, W. Taylor, P. Kirsch, R, Jammy, '''L. Morassi''', A. Padovani, and L. Larcher, “Connecting electrical and structural dielectric characteristics”, International Journal of High Speed Electronics and Systems (IJHSES), vol. 20(1), pp. 65-79, 2011.<br /> <br /> <br /> ----<br /> <br /> List of publications in international conferences:<br /> <br /> [C1] '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> [C2] G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> [C3] G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> [C4] '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> [C5] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> [C6] '''L. Morassi''', G. Verzellesi, P. Pavan, D. Veksler, I. Ok, H. Zhao, J. C. Lee and G. Bersuker, “Experimental/numerical investigation of buried-channel InGaA MOS-HEMTs with Al2O3 gate dielectric”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 103-105.<br /> <br /> [C7] '''L. Morassi''', G. Verzellesi, P. Pavan, I. Ok, H. Zhao and J. C. Lee, “Errors affecting split-CV mobility measurements in InGaAs MOS-HEMTs”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 327-329.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium (IRPS 2010); presentation of the work [C4]. <br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology (HETECH 2010); presentation of the work [C5]. <br /> <br /> Participation at the conference: 23rd International Conference on Indium Phosphide and Related Materials (IPRM 2011): presentation of the works [C6] and [C7].<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=8081 2011-06-01T10:34:42Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications in journals:<br /> <br /> [J1] A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, &quot;A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, IEEE Electron Device Letters, vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> [J2] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, IEEE Transactions on Electron Devices, vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> [J3] G. Bersuker, D. Veksler, C. D. Young, H. Park, W. Taylor, P. Kirsch, R, Jammy, '''L. Morassi''', A. Padovani, and L. Larcher, “Connecting electrical and structural dielectric characteristics”, International Journal of High Speed Electronics and Systems (IJHSES), vol. 20(1), pp. 65-79, 2011.<br /> <br /> List of publications in international conferences:<br /> <br /> [C1] '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> [C2] G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> [C3] G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> [C4] '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> [C5] '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> [C6] '''L. Morassi''', G. Verzellesi, P. Pavan, D. Veksler, I. Ok, H. Zhao, J. C. Lee and G. Bersuker, “Experimental/numerical investigation of buried-channel InGaA MOS-HEMTs with Al2O3 gate dielectric”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 103-105.<br /> <br /> [C7] '''L. Morassi''', G. Verzellesi, P. Pavan, I. Ok, H. Zhao and J. C. Lee, “Errors affecting split-CV mobility measurements in InGaAs MOS-HEMTs”, 23rd International Conference on Indium Phosphide and Related Materials (IPRM2011), Berlin, Germany, May 22-26, 2011, pp. 327-329.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium (IRPS 2010); presentation of the work [C4]. <br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology (HETECH 2010); presentation of the work [C5]. <br /> <br /> Participation at the conference: 23rd International Conference on Indium Phosphide and Related Materials (IPRM 2011): presentation of the works [C6] and [C7].<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=8027 2011-04-29T15:44:36Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, &quot;A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, IEEE Electron Device Letters, vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, IEEE Transactions on Electron Devices, vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, W. Taylor, P. Kirsch, R, Jammy, '''L. Morassi''', A. Padovani, and L. Larcher, “Connecting electrical and structural dielectric characteristics”, International Journal of High Speed Electronics and Systems (IJHSES), vol. 20(1), pp. 65-79, 2011.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentation of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentation of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7795 2011-02-02T14:45:04Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker, &quot;A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Trans. on Electr. Dev., vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentation of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentation of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7712 2011-01-10T10:05:14Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, Dec. 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Trans. on Electr. Dev., vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentation of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentation of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct. 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7711 2011-01-10T09:49:08Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Trans. on Electr. Dev., vol. 58, no. 1, pp.107-114, Jan. 2011.<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentation of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentation of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7709 2010-12-23T15:16:43Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentation of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentation of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7708 2010-12-23T15:16:09Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Participation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Participation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7707 2010-12-23T15:15:22Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conferences:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=User:83667&diff=7706 2010-12-23T15:10:06Z

<p>Lmorassi: moved User:83667 to Luca Morassi</p> <hr /> <div>#REDIRECT [[Luca Morassi]]</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7705 2010-12-23T15:10:06Z

<p>Lmorassi: moved User:83667 to Luca Morassi</p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conference:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7704 2010-12-23T15:03:15Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|200px|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conference:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=File:MyPic.JPG&diff=7703 2010-12-23T15:01:38Z

<p>Lmorassi: uploaded a new version of &amp;quot;File:MyPic.JPG&amp;quot;</p> <hr /> <div>mypic</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7702 2010-12-23T14:57:38Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conference:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activities:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7701 2010-12-23T14:56:57Z

<p>Lmorassi: </p> <hr /> <div>[[File:MyPic.JPG|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conference:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activity:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=File:MyPic.JPG&diff=7700 2010-12-23T14:55:19Z

<p>Lmorassi: uploaded a new version of &amp;quot;File:MyPic.JPG&amp;quot;</p> <hr /> <div>mypic</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=File:MyPic.JPG&diff=7699 2010-12-23T14:52:41Z

<p>Lmorassi: mypic</p> <hr /> <div>mypic</div>

Lmorassi https://web.ing.unimo.it/wiki/index.php?title=Luca_Morassi&diff=7697 2010-12-23T14:46:14Z

<p>Lmorassi: Created page with &quot;leftPh.D. Student Course: Electronics and Telecommunications ---- Brief CV: Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982. Fro...&quot;</p> <hr /> <div>[[File:IMG_6525.jpg|left]]Ph.D. Student<br /> <br /> Course: Electronics and Telecommunications<br /> <br /> ----<br /> Brief CV:<br /> <br /> Luca Morassi was born in Mirandola (Mo), Italy, on September 15th, 1982.<br /> <br /> From July 2008 to February 2009 he was in IMEC (Interuniversity MicroElectronics Centre, Leuven, Belgium) for an internship; during this period he worked on the characterization of High-k-based composed stack for MOSFETs (Metal Oxide Semiconductor Field Effect Transistor) gate oxide. In 2009 he received his academic master degree in Electronic Engineering from University of Modena e Reggio Emilia, Italy - Topic: &quot;Characterization and Simulation of High-k Dielectrics for Innovative Non-Volatile Memories&quot;. During 2009 he collaborated with University of Modena and Reggio Emilia with a research activity focused on the electrical characterization of high-k material for Non-Volatile Memory (NVM) devices. Since 2010 he is a PhD student at ICT Electronics &amp; Telecommunications Doctorate School, Modena, Italy with a research activity based on III-V compound semiconductor. His main research field is the characterization of InGaAs-channel MOSFETs and MOSHEMTs (Metal Oxide Semiconductor High Electron Mobilty Transistors) for high power and logic applications.<br /> <br /> <br /> ----<br /> <br /> List of publications and papers in international conference:<br /> <br /> <br /> A. Padovani, '''L. Morassi''', N. Raghavan, L. Larcher, L. Wenhu, K. L. Pey, and G. Bersuker&quot;, A Physical Model for Post-Breakdown Digital Gate Current Noise&quot;, Electr. Dev. Lett., vol. 31, no. 9, pp.1032-1034, Sep. 2010.<br /> <br /> '''L. Morassi''', L. Larcher, L. Pantisano, A. Padovani, R. Degreave, M. B. Zahid, and B. J. O'Sullivan, &quot;Advanced high-k materials and electrical analysis for memories: the role of SiO2-high-k dielectric intermixing&quot;, 41th International Conference on Solid State Devices and Materials (SSDM2009), Sendai, Japan, 2009.<br /> <br /> G. Bersuker, D. Heh, C. D. Young, '''L. Morassi''', A. Padovani, L. Larcher, K. S. Yew, Y. C. Ong, D. S. Ang, K. L. Pey, and W. Taylor, &quot;Mechanism of high-k dielectric-induced breakdown of interfacial SiO2 layer&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 373-378.<br /> <br /> G. Bersuker, D. Veksler, C. D. Young, H. Park, '''L. Morassi''', A. Padovani, L. Larcher, W. Taylor, P. D. Kirsch, and R. Jammy, &quot;Connecting electrical and structural dielectric characteristics&quot;, Advanced Workshop on 'Frontiers in Electronics' (WOFE 2009), Puerto Rico, December 13-16, 2009.<br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok, G. Bersuker, &quot;Interface-Trap Effects in Inversion-Type Enhancement-Mode InGaAs/ZrO2 N-Channel MOSFETs&quot;, Accepted for publication Trans. on Electr. Dev..<br /> <br /> <br /> ----<br /> <br /> Scientific activity:<br /> <br /> <br /> Partecipation at the conference: IEEE International Reliability Physics Symposium; oral presentaion of the work: <br /> <br /> '''L. Morassi''', G. Verzellesi, A. Padovani, L. Larcher, P. Pavan, D. Veksler, I. Ok, and G. Bersuker, &quot;Analysis of interface-trap effects in inversion-type InGaAs/ZrO2 MOSFETs&quot;, IEEE International Reliability Physics Symposium, Anaheim (CA), USA, May 2-6, 2010, pp. 532-535.<br /> <br /> Partecipation at the conference: European Workshop on Heterostructure Technology; oral presentaion of the work: <br /> <br /> '''L. Morassi''', A. Padovani, G. Verzellesi, D. Veksler, I. Ok and G. Bersuker, “Study of the Impact of Interface Traps on the Electrical Characteristics of InGaAs-based MOSFETs and MOSHEMTs with high-k Gate Dielectrics”, 19th European Workshop on Heterostructure Technology (HETEC2010), Crete, Greece, Oct 18-20, 2010.<br /> <br /> <br /> ----<br /> <br /> DISMI - Dipartimento di Scienze e Metodi dell'Ingegneria<br /> <br /> Università di Modena e Reggio Emilia<br /> <br /> Pad. Tamburini - Via Amendola 2<br /> <br /> 42122, Reggio Emilia<br /> <br /> <br /> mail: luca.morassi@unimore.it<br /> <br /> Tel: +39-0522522638<br /> <br /> Fax: +39-0522522609<br /> <br /> Cell: +39-3381468756</div>

Lmorassi