Valerio Di Lecce

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Ing. Valerio Di Lecce, Ph.D.

e-mail: valerio.dilecce82@gmail.com

Valerio Di Lecce was born in Modena, Italy, in 1982.
He received the bachelor and master degree in electronic engineering (both cum laude) from the University of Modena and Reggio Emilia, Modena, Italy, in 2005 and 2008, respectively.
In February 2012 he received the Ph.D. degree in electronics and telecommunications engineering with the Department of Information Engineering, University of Modena and Reggio Emilia, on the topic "Characterization and numerical simulations of GaN HEMTs for power and innovative applications" under the supervision of Prof. Alessandro Chini. During his time as a Ph.D. student he spent one year as visiting scholar at The Ohio State University, Columbus OH, USA, where he gained experience in the device fabrication process and acquired processing skills in a fully-staffed cleanroom under the supervision of Prof. Siddharth Rajan.
From 2012 to 2016, he was with E. De Castro Advanced Research Center on Electronic Systems, University of Bologna, Bologna, Italy.
His interests include measurements, characterization, modeling and numerical simulation of electronic devices.

Publications (up to 07 Nov. 2016)

JOURNALS:

– 2016 –

[J14] V. Di Lecce, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Simulation of Graphene Base Transistors With Bilayer Tunnel Oxide Barrier: Model Calibration and Performance Projection", IEEE Electron Device Letters, Vol. 37, no. 11, Nov. 2016, pp. 1489-1492.

– 2015 –

[J13] S. Vaziri, A.D. Smith, M. Östling, G. Lupina, J. Dabrowski, G. Lippert, W. Mehr, F. Driussi, S. Venica, V. Di Lecce, A. Gnudi, M. König, G. Ruhl, M. Belete, M.C. Lemme, "Going ballistic: Graphene hot electron transistors", Solid State Communications, Vol. 224, Dec. 2015, pp. 64-75.

[J12] V. Di Lecce, R. Grassi, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Graphene base heterojunction transistor: An explorative study on device potential, optimization, and base parasitics", Solid State Electronics, Vol. 114, Dec. 2015, pp. 23-29.

[J11] V. Di Lecce, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Simulations of Graphene Base Transistors With Improved Graphene Interface Model", IEEE Electron Device Letters, Vol. 36, no. 9, Sep. 2015, pp. 969-971.

– 2014 –

[J10] C. Pugnaghi, R. Grassi, A. Gnudi, V. Di Lecce, E. Gnani, S. Reggiani, and G. Baccarani, "Semianalytical quantum model for graphene field-effect transistors", Journal of Applied Physics, Vol. 116, no. 11, Sep. 2014, p. 114505.

[J9] R. Grassi, A. Gnudi, V. Di Lecce, E. Gnani, S. Reggiani, and G. Baccarani, "Boosting the voltage gain of graphene FETs through a differential amplifier scheme with positive feedback", Solid-State Electronics, Vol. 100, Oct. 2014, pp. 54-60.

[J8] R. Grassi, A. Gnudi, V. Di Lecce, E. Gnani, S. Reggiani, and G. Baccarani, "Exploiting Negative Differential Resistance in Monolayer Graphene FETs for High Voltage Gains", IEEE Transactions on Electron Devices, Vol. 61, no. 2, Feb. 2014, pp. 617-624.

– 2013 –

[J7] V. Di Lecce, R. Grassi, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Graphene-Base Heterojunction Transistor: An Attractive Device for Terahertz Operation", IEEE Transactions on Electron Devices, Vol. 60, no. 12, Dec. 2013, pp. 4263-4268.

[J6] V. Di Lecce, R. Grassi, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Graphene Base Transistors: A Simulation Study of DC and Small-Signal Operation", IEEE Transactions on Electron Devices, Vol. 60, no. 10, Oct. 2013, pp. 3584-3591.

[J5] M. Esposto, V. Di Lecce, M. Bonaiuti, and A. Chini, "The Influence of Interface States at the Schottky Junction on the Large Signal Behavior of Copper-Gate GaN HEMTs", Journal of Electronic Materials, Vol. 42, no. 1, Jan. 2013, pp. 15-20.

– 2012 –

[J4] A. Chini, V. Di Lecce, F. Fantini, G. Meneghesso, and E. Zanoni, "Analysis of GaN HEMTs Failure Mechanisms during DC and large-signal RF Operation", IEEE Transactions on Electron Devices, Vol. 59, no. 5, May 2012, pp. 1385-1392.

[J3] V. Di Lecce, S. Krishnamoorthy, M. Esposto, T.-H. Hung, A. Chini, and S. Rajan, "Metal-oxide barrier extraction by Fowler-Nordheim tunnelling onset in Al2O3-on-GaN MOS diodes", IET Electronics Letters, Vol. 48, no. 6, Mar. 2012, pp. 347-348.

– 2011 –

[J2] V. Di Lecce, M. Esposto, M. Bonaiuti, F. Fantini, G. Meneghesso, E. Zanoni, and A. Chini, "An Investigation of the Electrical Degradation of GaN High-Electron-Mobility Transistors by Numerical Simulations of DC Characteristics and Scattering Parameters", Journal of Electronic Materials, Vol. 40, no. 4, Apr. 2011, pp. 362-368.

– 2009 –

[J1] A. Chini, V. Di Lecce, M. Esposto, G. Meneghesso, and E. Zanoni, "Evaluation and Numerical Simulations of GaN HEMTs Electrical Degradation", IEEE Electron Device Letters, Vol. 30 no. 10, Oct. 2009, pp. 1021–1023.

CONFERENCES AND WORKSHOPS:

– 2015 –

[C17] V. Di Lecce, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Graphene-base heterojunction transistors for post-CMOS high-speed applications: Hopes and challenges", 73rd Device Research Conference—DRC 2015, Columbus OH, (USA), June 2015.

– 2014 –

[C16] V. Di Lecce, R. Grassi, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "Impact of crystallographic orientation and impurity scattering in Graphene-Base Heterojunction Transistors for Terahertz Operation", 44th European Solid-State Device Research Conference—ESSDERC 2014, Venice Lido (Italy), Sep. 2014.

– 2013 –

[C15] V. Di Lecce, R. Grassi, A. Gnudi, E. Gnani, S. Reggiani, and G. Baccarani, "DC and Small-Signal Numerical Simulation of Graphene Base Transistor for Terahertz Operation", 43th European Solid-State Device Research Conference—ESSDERC 2013, Bucharest (Romania), Sep. 2013.

– 2012 –

[C14] A. Chini, V. Di Lecce, F. Soci, D. Bisi, A. Stocco, M. Meneghini, A. Gasparotto, G. Meneghesso and E. Zanoni, "Experimental and Numerical Correlation between Current-Collapse and Fe-doping Profiles in GaN HEMTs", 2012 IEEE International Reliability Physics Symposium—IRPS 2012, Anaheim CA (USA), Apr. 2012.

– 2010 –

[C13] V. Di Lecce, M. Esposto, M. Bonaiuti, G. Meneghesso, E. Zanoni, F. Fantini, and A. Chini, "Study of GaN HEMTs degradation by numerical simulations of scattering parameters", 19th European Heterostructure Technology Workshop—HETECH 2010, Fodele (Crete), Oct. 2010.

[C12] M. Esposto, P. S. Park, D. N. Nath, S. Kryshnamoorthy, F. Akyol, V. Di Lecce, A. Chini, and S. Rajan, "Design of GaN HEMTs for Power Switching Operation", 19th European Heterostructure Technology Workshop—HETECH 2010, Fodele (Crete), Oct. 2010.

[C11] V. Di Lecce, M. Esposto, M. Bonaiuti, G. Meneghesso, E. Zanoni, F. Fantini, and A. Chini, "Experimental and simulated dc degradation of GaN HEMTs by means of gate-drain and gate-source reverse bias stress", 21st European Symposium on Reliability of Electron Devices, Failure Physics and Analysis—ESREF 2010, Gaeta (Italy), Oct. 2010.

[C10] V. Di Lecce, M. Esposto, M. Bonaiuti, F. Fantini, and A. Chini, "Study of GaN HEMTs Electrical Degradation by Means of Numerical Simulations", 40th European Solid-State Device Research Conference—ESSDERC 2010, Sevilla (Spain), Sep. 2010.

– 2009 –

[C9] A. Chini, F. Fantini, V. Di Lecce, M. Esposto, A. Stocco, N. Ronchi, F. Zanon, G. Meneghesso, and E. Zanoni, "Correlation between dc and RF degradation due to deep levels in AlGaN/GaN HEMTs", 2009 International Electron Devices Meeting—IEDM 2009, Baltimore MD (USA), Dec. 2009.

[C8] D. Saguatti, V. Di Lecce, M. Esposto, A. Chini, F. Fantini, G. Verzellesi, S. Boulay, A. Bouloukou, B. Boudjelida, and M. Missous, “Design of field-plated InP-based HEMTs”, 18th European Heterostructure Technology Workshop—HETECH 2009, Günzburg/Ulm (Germany), Nov. 2009.

[C7] M. Esposto, V. Di Lecce, M. Bonaiuti, F. Fantini, G. Verzellesi, S. De Guido, M. De Vittorio, A. Passaseo, and A. Chini, "Influence of interface states at Schottky junction on the large signal behaviour of Cu-gate standard AlGaN/GaN HEMTs", 18th European Heterostructure Technology Workshop—HETECH 2009, Günzburg/Ulm (Germany), Nov. 2009.

[C6] V. Di Lecce, M. Esposto, M. Bonaiuti, F. Fantini, A. Chini, G. Meneghesso, and E. Zanoni, "Influence of RF drive and switching frequency on degradation mechanisms in GaN HEMTs", 18th European Heterostructure Technology Workshop—HETECH 2009, Günzburg/Ulm (Germany), Nov. 2009.

[C5] G. Meneghesso, M. Meneghini, A. Tazzoli, N. Ronchi, A. Stocco, E. Zanoni, V. Di Lecce, M. Esposto, and A. Chini, "GaN HEMT Degradation Induced by Reverse Gate Bias Stress", 8th International Conference on Nitride Semiconductors—ICNS-8 2009, Jeju (South Korea), Oct. 2009.

[C4] A. Chini, V. Di Lecce, M. Esposto, G. Meneghesso, and E. Zanoni, "RF Degradation of GaN HEMTs and its correlation with DC stress and I-DLTS measurements", European Microwave Week—EuMIC 2009, Rome (Italy), Sep. 2009.

[C3] M. Esposto, V. Di Lecce, A. Chini, S. De Guido, A. Passaseo, and M. De Vittorio, "Comparison of Cu-gate and Ni/Au-gate GaN HEMTs large signal characteristics", 39th European Solid-State Device Research Conference—ESSDERC 2009, Athens (Greece), Sep. 2009.

[C2] E. Zanoni, M. Meneghini, A. Tazzoli, N. Ronchi, A. Stocco, V. Di Lecce, M. Esposto, A. Chini, and G. Meneghesso, "Reverse gate bias stress induced degradation of GaN HEMT", 36th International Symposium on Compound Semiconductors—ISCS 2009, Santa Barbara CA (USA), Sep. 2009.

– 2008 –

[C1] A. Chini, V. Di Lecce, M. Esposto, G. Verzellesi, S. Lavagna, A. Cetronio, and C. Lanzieri, "Trapping phenomena in field-plated high power GaAs pHEMTs", 17th European Heterostructure Technology Workshop—HETECH 2008, Venice (Italy), Nov. 2008.