MeMiTec/X-band Monolithic Phase Locked Loop
A fully monolithic phase locked loop working in the X-band frequency range has been designed using a 0.35um SiGe BiCMOS technology.
The PLL stability has been studied through system-level and transistor-level co-simulations allowed by ADS simulator. In particular, the phase frequency detector, the charge pump and the loop filter have been designed at transistor level, with the aim of getting high enough margins for the PLL stability. In the microphoto, the phase frequency detector and the charge-pump/loop-filter are visible in the lower left and lower right corners, respectively.
In the frame of the Europractice consortium, then the PLL has been laid out using Virtuoso of Cadence and submitted to the foundry for its implementation on silicon. The PLL has been experimentally tested and demonstrated to correctly work. The output frequency spans from 8GHz to 10GHz.